Enhanced macromodels of high-speed low-power differential drivers

High-speed differential interfaces implementing specific solutions for low-power consumption and low-EMI disturbances are vastly used in mobile platforms. In these devices, the slew rate is suitably controlled, the communication scheme alternates data-bursts followed by power-saving states, the voltage swing and the common-mode level are reduced. To achieve these targets, a key role in voltage-mode output drivers is played by an internal voltage-regulator. The latter exhibits a rich dynamic behavior, with non-negligible effects on the transmitter outputs, that need to be carefully characterized. In this paper, a modeling strategy based on a few key enhancements of state-of-the-art solutions is presented, leading to compact and accurate models. The feasibility and strengths of the proposed approach are verified on a low-power high-speed voltage-mode driver.