Characterization of flip-chip CMOS ASIC simultaneous switching noise on multilayer organic and ceramic BGA/CGA packages

This paper presents the characterization of flip-chip CMOS ASIC core logic and I/O simultaneous switching noise on several types of high density multilayer organic and ceramic ball grid array (BGA) and column grid array (CGA) packages. The results of time domain simultaneous switching output noise measurements with a CMOS test chip are presented. Core logic switching noise modeling and simulation results are also discussed.