Multi-Level Threshold Voltage Setting Method of String Select Transistors for Layer Selection in Channel Stacked NAND Flash Memory

In this letter, we propose a simplified channel stacked array with a layer selection by multi-level operation (SLSM) and a new string select transistors (SSTs) threshold voltage (V
_th
) setting method that all the SSTs on each layer are set to targeted the V
_th
values simultaneously by one erase operation. To verify the validity of the new method in SLSM, TCAD simulations are performed, and a fabricated pseudo SLSM is measured. It is verified that the V
_th
values of SSTs are set to the targeted V
_th
values by the new method. Moreover, memory operations are examined in the fabricated structure after setting the V
_th
values of all the SSTs by the new method. As a result, stable memory operations are obtained successfully without the interference between stacked layers.