FPGA implementation of modified type-C PID control system

Proportional-integral-derivative (PID) controller is a vastly used control algorithm for many real-time control applications and among many types of PID controller, FPGA based PID controller is one of the effective one. This paper is based on design and implementation of a FPGA based system for a modified C-Type PID control system algorithm. The modified C-Type algorithm is used to attain a stable response. The proposed system is designed using (Verilog HDL) and implemented on Xilinx Spartan 6 (Model: xc6slx150t–3fgg676). The proposed design utilizes microprocessor architecture (SAP) to attain a compatible design with all logic devices. Here, proposed design utilizes FPGA efficiently with 836 look up tables and 742 registers along with a maximum delay of around 14 ns. The proposed design has higher functionality with lesser number of blocks so that, this architecture can be a good match for complex control application.