Ultra-low power green electronic devices

Power consumption is the crucial challenge for electronics. To lower the DC leakage power (P
_DC
), we applied the high-κ gate dielectric to CMOS from the physics of Q equivalent to CV. More than 2 orders of magnitude lower P
_DC
is obtained at small 0.5-0.9 nm equivalent-oxide-thickness (EOT). The high-κ dielectric also increases the charge controllability of flash memory and decrease the V
_T
disturbance by nearly cells, which improves cell density and cost. The AC power (P
_AC
) can be lowered by using high-mobility Ge CMOS at a lower V
_D
and 3D IC with a small capacitance, from basic physics of P
_AC
equivalent to CV
_D
²
f/2.