Fabrication and characterization of silicon nanowire ultra-thin channel poly-Si junctionless field effect transistors with a trench structure

This work demonstrates trench junctionless poly-Si thin-film transistor (JL-FET) [1] with ultra-thin body is obtained through dry etching process. JL-FET L
_G
= 0.6μm shows excellent performance in a low drain-induced barrier lowering (DIBL), high I
_ON
/I
_off
(>10
⁸
), excellent gate control and reduced sensitivity to temperature in terms of V
_TH
and SS.