Utilizing substrate damage introduced by MERIE of single crystal silicon for selective CVD of oxide

Highly conformal O/sub 3//TEOS-SiO/sub 2/ was deposited over high aspect ratio test-tube shaped silicon trenches which were fabricated by plasma etching processes, leading to different levels of substrate damage. For substrate damage exceeding a certain level, the oxide deposition could be suppressed at the bottoms of the silicon trenches for certain deposition conditions. Variations of the process parameters and measurements of the self-bias voltage during the various silicon etching processes suggest that this threshold damage level is mainly, if not exclusively, determined by the kinetic energy of the ions bombarding the substrate during plasma etching. The regime of process parameters for silicon etching allowing subsequent selective oxide deposition was identified; the substrate damage in single crystal silicon resulting from silicon etching was characterized by thermal wave measurements.