Scientific computing and fault mitigation on FPGA aboard the Solar Orbiter PHI instrument

In this paper we propose a SIMD multiprocessor architecture to reach high performance in floating point operations by using radiation tolerant FPGA devices, and under narrow time and power constraints. This architecture is used in an instrument that carries out the scientific analysis aboard the ESA's Solar Orbiter mission. Some details for extending the architecture to other problems are pointed. A study of how the radiation induced errors affect each block of the architecture is detailed, and two fault mitigation strategies are described. One of them supplies a fault recovery mechanism for correcting errors in the architecture. The achieved FPGA system besides reaches the requirements and improves the ground-based system performance based on commercial CPUs regarding time and power consumption.