Design of an efficient 900 GHz antenna in standard CMOS technology for imaging arrays

This paper describes and addresses the challenges that are encountered while designing a 900 GHz antenna for FET detectors using a standard submicron CMOS technology. The reduced metal stack, the problem of surface waves and technology-related rules are taken into account in order to properly design an efficient antenna, with the objective to couple it to field-effect transistor (FET) detectors in a focal-plane array configuration. Simulations on a 0.15-μm standard CMOS technology show that up to 58% efficiency with responsivity in the several kV/W range can be achieved.