Errata for “A TDC-Free Mostly-Digital FDC-PLL Frequency Synthesizer With a 2.8–3.5 GHz DCO” [Feb 15 450-463]

Presents corrections to the article, “A TDC-free mostly-digital FDC-PLL frequency synthesizer with a 2.8–3.5 GHz DCO,” (Venerus, C. and Galton, I.) IEEE J. Solid-State Circuits, vol. 50, no. 2, pp. 450–463, Feb. 2015.