Stacking integration methodologies in 3D IC for 3D ultrasound image processing application: A stochastic flash ADC design case study

In three-dimensional integrated circuit (3D IC) systems that use through-silicon via (TSV) technology, a significant design consideration is the coupling noise to/from TSVs. In Analog/Mixed signal ICs, the TSV coupling effect can cause coupling noise disturbance and degrades the performance of sensitive analog devices. In this paper, two different stacking integrations for the sensor array and the 3D IC, are considered and compared. In the face-up stacking integration, the transducers' flip chip bonded pads are directly bonded to the integrated circuit. In facedown integration type, however, the connections from the sensor output signal to the front end electronics is done via the TSVs. The TSV coupling noise is compared for the two schemes using the existing TSV coupling noise model. To validate the impact of stacking integration on the coupling noise, an ADC case study was designed and implemented using 130nm device technology and Tezzaron TSV technology. The simulations results show that the face-up integration could suppress the coupling noise by 10db. Moreover, a 23% reduction in footprint is achieved in this stacking integration.