A flexible interconnect technology demonstrated on a wafer-level chip scale package

In this paper, a flexible interconnect technology, including Cu wire bonding and pre-solder was proposed and demonstrated in 200 mm
²
WLCSP. Flexible interconnects were fabricated by a modified industry wire bonder with good position accuracy and height uniformity. Different wire geometries were created. In addition, influence of wire material, die thickness and solder volume is also investigated. Chips with more than 1000 interconnects were directly mounted on PCB and underfill is not used after assembly process. All assembled units were subjected to the board level reliability thermal cycling test according to JEDEC standard. Some of them were also subjected to drop tests. Both experimental and finite element analysis have demonstrated that flexible interconnects can greatly improve the thermal mechanical reliability and survived over 500 cycles without underfill. In the drop test, N-shape interconnects have better performance than I-shape interconnects and pass over 30 drops. This flexible interconnection technology can lead to excellent reliability in larger WLCSPs without the use of underfill. In addition, this flexible interconnect could be applied in a fine pitch PoP and the number of I/O pads can be increased without modifying the package structure.