Development and electrical investigation of novel fine-pitch Cu/Sn pad bumping using ultra- thin buffer layer technique in 3D integration

A high yielding fine-pitch submicron Cu/Sn bonding scheme has been successfully demonstrated. With inserting the ultra-thin buffer layer, near sub-micron thickness Cu/Sn pad bonding can be achieved. The fine pitch Cu/Sn interconnects can be also further extended. The modified Kelvin feature in chip level and tens of thousands series interconnects per chip with a density of 3.4 × 10
⁵
/cm
²
in wafer level are fabricated and completely investigated on electrical characteristics. Several critical reliability assessments, such as TCT and un-bias HAST, are also investigated the variation and standard error of the fine-pitch pad bonding scheme. With excellent mechanical properties, bonding quality, electrical and reliability results, the approach is suitable for future 3D vertical interconnects.