Digital-to-time converter using set in HSPICE

This paper presents a combination of two very important techniques in order to reduce power consumption and area. Recently a very useful method has been presented for converting digital to time in 65nm CMOS. Since Single-Electronic technology has been managed to be a novel nanoelectronic solution to reduce power consumption and area, even smaller than recent efforts in CMOS technology, we decided to simulate the suggested DTC using Single-Electron-Transistor. We also changed the suggested circuit a little bit.