Performance and reliability of strained SOI transistors for advanced planar FDSOI technology

In this paper, we investigate the potential of strained Silicon-On-Insulator (sSOI) for the future advanced CMOS nodes. Strained FDSOI depicts a 30% higher performance in term of I
_ON
/I
_OFF
thanks to higher mobility. Changes in band structure reduce the gate leakage and devices depict superior HC reliability at same drive current. The better interface quality with sSi layer leads to higher immunity to dangling bonds generation. Strain integration does not affect BTI and breakdown reliability.