A Low-Noise and Area-Efficient PWM- $\Delta \Sigma $ ADC Using a Single-Slope Quantizer for CMOS Image Sensors

This paper proposes a multibit pulsewidth modulated (PWM) delta-sigma (ΔΣ) analog-to-digital converter (ADC) using a single-slope (SS) quantizer for a CMOS image sensor (CIS). In the proposed ADC, the multibit ΔΣ modulation is performed by converting the pulsewidth of the PWM signal into multibit data using an SS quantizer. This suppresses the random noise by the multi-sampling operation and reduces the area of the multibit ΔΣ ADC by adding a ramp signal to a single-bit ΔΣ ADC. The proposed ADC with 12-b resolution was fabricated using a 0.13-μm CIS process with a pixel array which has a Bayer patterned color filter and an image format of 580 x 450 with a pixel size of 5 μm x 5 μm. The size of the test chip is 4 mm x 5 mm, including the area of the proposed channel ADC, which occupies only 10 μm x 400 μm per channel. The measured results show a random noise of 65 μV and a dynamic range of 70.4 dB.