Recent trend of package warpage characteristic

Innovation in electronic packaging technology has integrated significant computing function within a smaller, yet more efficient foot print of electronic devices. Among the challenges of electronic package technology, the package dynamic warpage behavior received constant focus to ensure healthy component board assembly yield. In this paper, the dynamic warpage trends for Package on Package and its memory, Plastic Ball Grid Array and Flipped Chip Ball Grid Array packages are presented to provide an overview of current industry trends of package warpage based on the samples donated. This effort enables the electronic industry to understand further the current specification available and to understand the qualification method used to characterize the recent package's dynamic warpage. The effect of bake and manufacturing exposure time on package dynamic warpage and the challenges in quantifying shape will be discussed and should be considered for future package warpage characterization.