PVCoherence: Designing Flat Coherence Protocols for Scalable Verification

The goal of this work is to design cache coherence protocols with many cores such that they can be verified with existing verification methodologies. In particular, the authors focus on flat (nonhierarchical) coherence protocols using a mostly automated methodology based on parametric verification. They present design guidelines that, if followed by architects, enable parametric verification of protocols with arbitrary numbers of cores.