Challenges in the reliability of 3D integration using TSVs

One of the possible target applications of 3D-integration is the high performance computing (HPC). The improved performance of 3D-integrating can base on an Interposer with heterogeneous integration of special high performance fluidic cooling, individual power supply next to the microprocessor and a tailored packaging approach. This paper focuses on the reliability assessment of the interposer regarding the interaction of TSV, wiring and fluid channel integration based on current publications in correlation with the selected specifications for Interposer manufacturing. A further part is the correlation with initial results of stress simulation and measurements applied to the Interposer design specifications of cavities and interconnect features (used for sealing the cooling channels and as electrical interconnect). We give an overview of a new level of complexity of 3D integration and discuss certain failure mechanisms that can influence the performance of 3D integrated devices. We show that the prediction of failure locations becomes possible by the method of finite element modeling but with the necessity to obtain process specific material data as an input for the simulation. An overview shows the possibilites of residual stresses analyses on test vehicles by using special methods of Raman spectroscopy and fibDAC including interpretation challenges of gathered measurement data. Furthermore the application of a new method for fatigue testing is proposed and discussed.