Hardware task scheduling for heterogeneous soc architectures

This paper presents our work on extending artificial neural networks use for real-time task scheduling to heterogeneous System-on-Chip architectures. The Hopfield model is the neural network model considered in this study. We introduce new constructing rules to design neural network so that architecture heterogeneity can be considered. We show that these new rules ensure the network stabilization on states that take into account the architecture heterogeneity while meeting the imposed task constraints.