System-level characterization of a real-time 4×4 MIMO-OFDM transceiver on FPGA

The performance of an FPGA-based MIMO-OFDM testbed is investigated through measurements. The setup includes two real-time terminals, supporting up to 4 spatial streams, and a wideband multipath channel emulator. The performance of the system, transmitting at data rates up to 216 Mbit/s over a 20MHz channel in the 2.4 GHz ISM band, is benchmarked under different channel scenarios. The impact of different algorithm choices at the receiver, including parameter estimation for synchronization and channel estimation, on system-level performance is also evaluated. The FPGA implementation results for the different PHY-layer subsystems provide relevant insight into possible tradeoffs between performance and silicon complexity.