A novel hardware-friendly self-adjustable offset min-sum algorithm for ISDB-S2 LDPC decoder | IEEE Conference Publication | IEEE Xplore

A novel hardware-friendly self-adjustable offset min-sum algorithm for ISDB-S2 LDPC decoder


Abstract:

In this paper, a novel self-adjustable offset min-sum LDPC decoding algorithm is proposed for ISDB-S2 (Integrated Services Digital Broadcasting via Satellite - Second Gen...Show More

Abstract:

In this paper, a novel self-adjustable offset min-sum LDPC decoding algorithm is proposed for ISDB-S2 (Integrated Services Digital Broadcasting via Satellite - Second Generation) application. We present for the first time a uniform approximation of the check node operation through mathematical induction on Jacobian logarithm. The approximation theoretically shows that the offset value is mainly dependent on the difference between the two most unreliable inputs from the bit nodes and the algorithm proposed can adjust the offset value according to the inputs during the iterative decoding procedure. Simulation results for all 11 code rates of ISDB-S2 demonstrate that the proposed method can achieve an average of 0.15dB gain under the same Bit Error Rate (BER) performance, compared to the Min-sum based algorithms, and consumes only 1.21% computation complexity compared to BP-based algorithms in the best case.
Date of Conference: 23-27 August 2010
Date Added to IEEE Xplore: 30 April 2015
Print ISSN: 2219-5491
Conference Location: Aalborg, Denmark

References

References is not available for this document.