Adaptive filters implementation performances under power dissipation constraint

Power consumption is an essential criteria in embedded systems. Therefore, it is important to decrease it at every stage of the design flow. It is well known that the choice of a signal processing algorithm has a great impact on the power dissipation. For this purpose, a HLS (High Level Synthesis) CAD (Computer Aided Design) tool (gaut_ w) has been developed. It allows to estimate the power dissipation of a dedicated VLSI circuit from the algorithmic description of the application. It also reduces the power dissipation during the architectural synthesis in order to target low power time constrained VLSI circuits. This tool has been applied to different adaptive filters as the NLMS, the BLMS and the GAL filters for a radio-communication application. The power dissipation on a low-power TMS320C50 DSP (Digital Signal Processing) has been also estimated.