A 500 MHz 2d-DWT VLSI processor

The Discrete Wavelet Transform (DWT) is a well-known mathematical tool, which has been proved to offer very good results for Digital Signal Processing applications. The DWT requires a massive computation, especially when real-time constraints are to be met, as it happens in a wide spectrum of applications; therefore dedicated processors are needed to achieve the necessary performance. In this paper a very high-speed VLSI implementation of a two-dimensional DWT processor suitable for image processing is presented. The architecture is based on a bit-serial arithmetic; linear systolic arrays are employed for row filtering and parallel arrays for column filtering. Each basic building block of the arrays has been designed using a True Single Phase Clocking logic, then a manual place and route of the derived cells has been carried out. The processor works at 500 MHz and occupies less than 50 mm
²
in a 0.7 pm CMOS technology.