An open-loop differential time amplifier

An open-loop differential time amplifier is proposed to achieve a large time gain up to 114 and a wide range of input time difference up to 3.6ns. The time gain is determined by the ratio of two bias current values with the slew-rate control method. The differential architecture reduces the rms noise of the output time difference by 45% and the mismatch calibration reduces the time offset by 85%. The time amplifier consumes 1.5mW at 100MS/s and 1.2V supply in a 0.13μm CMOS process.