Abstract:
This paper describes a real time hardware prototype for the de-interlacing of Standard Definition video signals. The line rate is doubled in order to remove specific arte...Show MoreMetadata
Abstract:
This paper describes a real time hardware prototype for the de-interlacing of Standard Definition video signals. The line rate is doubled in order to remove specific artefacts of interlaced signals, like interline flicker and line crawl. The hardware applies Digital Signal Processing (DSP) in order to achieve a high performance sequential scan conversion of interlaced signals. The programmability of the prototype gives the possibility to use it as a basis for evaluations of real time line-rate conversion algorithms for both 50 Hz or 60 Hz video sequences.
Date of Conference: 10-13 September 1996
Date Added to IEEE Xplore: 27 April 2015
Print ISBN:978-888-6179-83-6
Conference Location: Trieste, Italy