Analysis of a parallel lexical-tree-based speech decoder for multi-core processors

We present a systematic analysis of a lexical-tree based parallel search algorithm for multi-core desktop processors. We introduce an analytical model that predicts the speedup from parallelization after accounting for load imbalance among the cores. Various sources of overhead in the parallel search algorithm are described, benchmarked and analyzed. Besides load imbalance, these include the inherently serial steps of the parallel search algorithm and an increase in main memory access latency.