A multi-time frame scan test scheme for reduction of test time

As system-on-chips grow in size and complexity, test application time in the scan chain increases rapidly. This paper proposes, based on the conventional scan test structure, a test method, MTFST(Multi-Time-Frame-Scan-Test), to solve the above problem. For this method, scan patterns, after applied to the scan chain, are propagated through the circuit under test for multiple timeframes and then shifted out for observation. We use elite genetic algorithm to generate initial MTFST vectors that have better fault detection characteristics. Experimental results on benchmark circuits show effectiveness of this scheme.