An efficient MOS transistor charge/capacitance model with continuous expressions for VLSI

A unified modeling approach for the submicron MOS transistor charge/capacitance characteristics in all operation regions is presented. The development of the MOS charge model is based on the charge density approximation to reduce the complexity of the expression. The unified charge densities in gate, channel, and bulk are obtained with assistance of the sigmoid, hyperbola, and exponential interpolation techniques. By carrying out the integration of the charge densities along the channel area, the terminal charges associated with gate and bulk can be obtained. The non-reciprocal capacitance behavior is well realized in this model. Good agreement between the measurement data and simulation results is obtained.