A study of capacitance-voltage hysteresis in HfO2/InGaAs metal-oxide-semiconductor systems

In this work, we performed a study of capacitance-voltage (C-V) hysteresis in HfO
₂
/InGaAs metal-oxide-semiconductor (MOS) systems. C-V hysteresis measurement with a stress time in accumulation has been used in this investigation. Charge trapping density estimated from C-V hysteresis at all stress times is comparable to or even greater than the interface state density in Hf0
₂
/InGaAs MOS systems, indicating that C-V hysteresis is an important problem to resolve. C-V hysteresis is observed to increase with a power law dependence on the increasing stress time in accumulation. The majority of the charge trapping is a reversible behaviour in the case of the n-InGaAs, but there is a significant permanent trapping component in the p-InGaAs sample. Based on an oxide thickness series, it is demonstrated that C-V hysteresis increases linearly with the increasing oxide thickness with the charge trapping density being a constant value for all thicknesses, indicating that the trapping is predominately localised in a plane (in cm
^-2
) near/at the HfO
₂
/InGaAs interfacial oxide transition layer.