A new approach for trap analysis of vertical NAND flash cell using RTN characteristics

We introduce new phenomena that show turn-on at back-side for Vertical NAND (V-NAND) with back-insulator and propose a new method to analyze the trap of back-interface related to the phenomena. Back-side traps have been analyzed with the back-gate structure [1]. However, V-NAND has no back-gate structure, so it's difficult to observe traps. With RTN method we proposed, it's possible for us to observe back-side traps.