A roadmap to low cost flip chip and CSP using electroless Ni/Au

Flip chip (FC) technology is gaining an increased level of importance for a variety of applications based on flip chip on board or flip chip in package. The first driving force for the introduction of this technology was the need to achieve increased speed and performance along with higher I/O count. A breakthrough, however, will be the use of flip chip due to cost reduction. For this aim, it is essential to use low cost bumping techniques in combination with an SMT-compatible assembly method. The FC techniques presented in this paper are all based on an electroless Ni/Au bumping process which has been developed by TUB/IZM and implemented into production by Pac Tech. This paper shows a roadmap based on electroless nickel/gold bumping for all flip chip interconnection technologies currently used in industry. Also, the roadmap to future developments in the semiconductor industry based on 300 mm wafers and the use of new pad metallisations such as Cu is shown. The compatibility of electroless nickel bumping in particular with these new technologies to be implemented in wafer manufacturing in the next millenium shows that this key technology offers a roadmap to flip chip technology not only for products and wafer technologies in use at present but for next generation wafer technologies. This paper looks at electroless Ni as a basis for anisotropic conductive adhesive (ACF) flip chip assembly, for polymeric flip chip assembly (conductive adhesive) and for soldering and direct chip attach-type applications using different solder alloys.