A hardware/software co-design approach for Ethernet controllers to support time-triggered traffic in the upcoming IEEE TSN standards

Due to the increasing bandwidth and timing requirements, next generation communication backbones in cars will most likely base on real-time Ethernet variants that satisfy the demands of the new automotive applications. The upcoming IEEE 802.1Qbv standard shows communication approaches based on coordinated time devision multiple access (TDMA) to be good candidates for providing communication with determinism and highly precise timing. Implementing time-triggered architectures in software requires significant development effort and computational power. This paper shows a scalable HW/SW co-design approach for new real-time Ethernet controllers based on the partitioning into communication and application components. The tasks required for communication are divided: Time-critical and computationally intensive parts are realised in dedicated hardware modules allowing the attached CPU to fulfil the timing requirements of the automotive application without interference. The evaluation using a Field Programmable Gate Array (FPGA) based prototype implementation shows that the precision for the time-triggered transmission and the performance of the proposed implementation of the required synchronisation protocols satisfies the requirements of applications in the automotive domain.