Optimizing 60-V integrated free-wheeling diode for automotive 0.8-/spl mu/m Bi-CMOS-DMOS technology

A cost-effective approach for integration and optimization of low substrate injection 60 V power diodes and 60 V complementary L-DMOS into a twin-well submicron VLSI CMOS process is addressed in this paper. Optimized free-wheeling (FW) diodes fabricated with stacked buried layers are shown to reduce substrate injection by 5 to 7 orders of magnitude compared to typical diodes. A built-in trade-off between the cell pitch and forced diode recovery time for the FW diode is analyzed using two-dimensional device simulations. The trade-offs associated with optimization of drain-engineered L-DMOS devices vs. power diodes are investigated through device simulations using MEDICI and SUPREM-IV and compared to experiments. An airbag controller power IC designed using this technology is experimentally demonstrated for the first time.