A cross-based adaptive cost SOC architecture for stereo matching processor

This paper presents a System-On-Chip (SOC) architecture of stereo matching processor incorporating with cross-based adaptive cost. This architecture can effectively improve the robustness of disparity map in different lighting and various kind of texture environment. Both adaptive raw cost computation and cross-based adaptive window cost aggregation are adopted to generate highly accurate disparity map. Also, with the advantage of hardware parallelism stereo disparity map can be produced real-timely. The architecture is suitable for SOC implementation and has been verified on Virtex-7 XC7VX485T FPGA achieving 65 fps for 1280×1024 pixel images.