A new DDFS based on unequal length piecewise linear approximation with one bit error correction

A new method has proposed for implementing phase to sinusoid amplitude conversion for 32 bits direct digital frequency synthesis (DDFS). It based on non-uniform piecewise linear approximation with one bit error correction. The main idea is partition the angle in the interval (0, π/2 ) into 64 non-uniform segments. Using linear function substitute approximates the sine function in every segment. The segments' slope value and start point value need store (total 1408 Bits). Other sine value can calculate by an 11×7 multiplier and an 11 bits adder. Added one bit error implementing by combination logic into the 11 bits adder improve the SFDR of the DDFS. The RTL level simulation results show that the SFDR is 91.2dBc after correction without phase truncated when the output sine amplitude is 11 bit.