A 25Gb/s adaptive decision feedback equalizer for 100G Ethernet in 65NM CMOS technology

This paper describes a 25Gbps adaptive 2-tap decision feedback equalizer (DFE) for serial backplane receiver. The proposed DFE employed a soft-decision structure and an adaptive engine based on improved LMS algorithm (sign-sign LMS) which is designed in 65nm CMOS technology. Post-simulation results show that it can totally compensate 15.5dB loss at the Nyquist frequency for 25Gb/s PRBS31 transmission over 200mm RLGC (resistance, inductance, conductance and capacitance) channel. The active adaptive DFE area is 0.039 mm² and total power consumption is 10.5mw from 1V supply.