A 0.75V continuous-time sigma-delta analog-to-digital converter in CMOS technology

In this work, a low-voltage implementation for continuous-time ΣΔ analog-to-digital converters is proposed. The low-voltage implementation technique is based on implementing the sigma delta integrators using CMOS inverters. The proposed technique is applied to a third-order single loop modulator. The first integrator in the loop filter is an active RC integrator, while the remaining integrators are Gm-C based. A 74 dB SNDR is achieved for a signal bandwidth of 41 kHz and sampling frequency of 100 MHz, while consuming 1 mA from 0.75 V supply, in 65 nm CMOS technology.