Abstract:
The design of spectrum monitoring receiver usually uses such a hardware model being consist of FPGA (Field Programmable Gate Arrays) and DSP (Digital Signal Processor) ma...Show MoreMetadata
Abstract:
The design of spectrum monitoring receiver usually uses such a hardware model being consist of FPGA (Field Programmable Gate Arrays) and DSP (Digital Signal Processor) mainly, which requires the baseband datas and spectral datas under different bandwidths can be real-time transmitted between the FPGA and DSP. In this paper, according to the characteristics of the receiver, by using the ability, processing datas in the background, of the EDMA3 (enhanced direct memory access 3) which is independent of CPU, a real-time data transmission scheme combining with the EDMA3 and McBSP (Multichannel Buffered Serial Port) is designed and implemented. This article mainly introduces the working principle of EDMA3 and the configuration processes of EDMA3 and McBSP. At the same time, the ping-pong buffer technology is introduced in detail. The feasibility and the practicability of the scheme has been verified by tests.
Published in: 2014 IEEE International Conference on Signal Processing, Communications and Computing (ICSPCC)
Date of Conference: 05-08 August 2014
Date Added to IEEE Xplore: 18 December 2014
ISBN Information: