GaN for Next Generation Electronics

We report the development of a new generation of GaN devices and their performance. This new E/D technology based on "Si-like" processes will offer the possibility of competing with Si-Ge and C-MOS devices for mixed-mode circuits and mm-Wave array applications. The advantage comes from their superior breakdown voltages and f
_t
/f
_max
while using processes and geometries only known so far by the Si industry. We are reviewing the performances of these devices developed under the DARPA NEXT program at TriQuint and other companies (HRL). At TriQuint, 30nm self-aligned gate InAlN/AlN/GaN devices achieved simultaneous f
_T
/f
_max
of 359/347GHz. Thanks to their reduced geometry, these devices make excellent low-voltage RF devices. We published excellent performances at 10GHz with up to 67-69% PAE at 6V bias and 30GHz with up to 14.4dB associated gain and 2.6W/mm, 39.6% PAE at 8V bias. The Noise Figure of these devices at 10GHz was ~0.25dB with 3V drain bias. HRL has demonstrated f
_T
/f
_max
as high as 454/444GHz at V
_d
=3V with a 20nm gate self-aligned device. It is tempting to envision a GaN-on-Si technology based on such devices where a fabrication process fully compatible with a Si foundry would allow the use of 8" wafers but more importantly the use of a large number of interconnect layers with micron and sub-micron geometries, both unknown to the III-V world. Preliminary work has been reported by Raytheon with GaN transistors on a 200 mm GaN-on-Si wafer (grown by MBE) fabricated with Au free metallurgy.