Multilayer perceptron network with integrated training algorithm in FPGA

In this manuscript we present the implementation of an artificial neural network type Multilayer Perceptron (ANN-MP or NNMP) in Field-Programmable Gate Arrays (FPGA), including Back-Propagation training method based on descendent gradient. This network has 2 reconfigurable hidden layers, adjustable parameters (epochs and ratio learning) and batch learning. The proposed architecture aims to reduce the number of logical elements to be used, so serial processing is utilized. In order to test the performance of the trained network, a nonlinear function was approximated with satisfactory results.