Laser Testing Methodology for Diagnosing Diverse Soft Errors in a Nanoscale SRAM-Based FPGA

In this paper, we propose a method that combines dedicated test designs, readback and bitstream comparisons to investigate soft errors in a nanoscale SRAM-based FPGA under photoelectric stimulation. Static test is performed to analyze the SEU dependency to voltage supply. Static cross-section and threshold energy are presented. Dynamic test is accomplished by using a set of designs in order to diagnose errors from SET in the logic clock tree, SEU in embedded soft-core processor and in the reconfigurable ICAP interface. A picosecond laser is used in the experiments.