A two switch topology with interleaved buck-boost converter for low stress PFC applications

When the universal-input applications are dealt with the power-factor-correction (PFC), there is always the problem of higher switch voltage stresses and higher inductor conduction losses. The paper has a topology namely buck-interleaved buck-boost (BuIBB) converter has lower switch voltage stresses and lower inductor conduction losses compared to other single-switch or two-switch converter topologies. In the paper, the analysis of the converter operation, component stresses and the total root-mean-square (RMS) currents is shown.