The direct skew detect synchronous mirror delay (Direct SMD) for ASICs

This paper describes a new concept nonfeedback CMOS digital clock generator, Direct SMD, that achieves clock deskew in only two clock cycles for ASICs having unfixed and various clock paths. The Direct SMD detects clock skew as well as clock cycle by introducing direct skew detector and clock suspension circuitry. The direct skew detection scheme completely removes the phase error caused by the delay fluctuation of the clock driver. The measured results demonstrate that the Direct SMD can successfully eliminate various amounts of clock skew (2.0 ns-3.0 ns) at 200 MHz in two clock cycles.