New System-in-Package (SiP) Integration technologies

New System-in-Package (SiP) with innovative Wafer-Level-System-Integration (WLSI) technologies that leverage foundry core competence on wafer processes have been demonstrated. The WLSI technologies include Chip-on-Wafer-on-Substrate (CoWoS
^TM
) 3DIC and interposer, Integrated Fan-Out (InFO) and Chip-Scale Wafer-Level-Packaging. Wide application portfolio from very low I/O pin-count, low-cost devices, to medium, high and ultra-high pin-count are realized. Chip-partition followed by flexible powerful integration of single-chip or multi-chips, advanced or matured Si, logic and memory, SoC and sensor/MEMS. System values include low profile, low power, high bandwidth along with competitive cost can be readily achieved. With the chip-partition, we can sustain Moore's law longer.