A HomePlugAV SoC in 40nm CMOS technology

A cost-optimized 40nm CMOS integrated powerline communications SoC is presented. This SoC includes all the analog and digital components required for the HomePlugAV standard. Circuit techniques for the RXPGA and TX line driver are described. The powerline SoC can achieve full HPAV 200Mbps PHY rate and operates with a 96dB channel dynamic range with low external component cost.