In Situ ESD Protection Structure for Variable Operating Voltage Interface Applications in 28-nm CMOS Process

A multiple-discharge-path electrostatic discharge (ESD) cell for protecting input/output (IO) pins with a variable operating voltage (0.5–3.5 V) is presented. This device is optimized for low capacitance and synthesized with the circuit IO components for in situ ESD protection in communication interface applications developed in the 28-nm high-k metal-gate CMOS technology.