A high aspect ratio via hole dry etching technology for high power GaAs MESFET

The dry etching technique is investigated to achieve high-aspect-ratio via holes with smooth inner surface for the application of high-power GaAs MESFET with the source island via hole (SIV) structure. Mask materials and etching conditions are optimized to obtain a high aspect ratio of 2.6. The uniformity of the etched depth is +or-3.5% deviation across a 3-in wafer, and the reproducibility is +or-5.5% deviation. This technique allows the SIV FET with dry etched via holes to realize a packing density 1.7 times higher than that of conventional FETs. At 18 GHz, the SIV FET with 1350- mu m gate width provides a power output of 26.2 dBm at 1-dB gain compression and a linear power gain of 7.5 dB.<
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