Bulk and FDSOI SRAM resiliency to radiation effects

With the increasing density of transistors in advanced technology nodes, the radiation is an ongoing problem affecting the contents of memory cells. This paper presents the simulation results of radiation immunity for two different memory cell technologies: 32nm Bulk CMOS and 28nm FDSOI. The effect of Single-Event Upset (SEU) caused by the heavy ion impact with different Linear Energy Transfer characteristic (LET) is analyzed. A 32nm bulk 6T-SRAM cell is at least 6 times less resilient to heavy ion strikes than the 28nm FDSOI one.