Understanding the impact of temperature variations on measurement of stress dependent parameters of bipolar junction transistors

The macroscopic stress dependence of bipolar junction transistors (BJTs) can be modeled by three transport model parameters as a function of stress: saturation current I
_S
, forward current gain β
_F
, and Early voltage V
_A
. Recent research has shown that Early voltage V
_A
is independent of stress, so it is not discussed in detail in this paper. Unfortunately, accurate extraction of model parameters I
_S
and β from measurement of collector current I
_C
and base current I
_B
is easily compromised by the large temperature sensitivity of the BJT due to the exponential dependencies on temperature. For example, if one measures I
_C
and I
_B
with constant base-emitter voltage, one must contend with temperature sensitivities as large as 45 × (ΔT/T) - i. e. a 1° K change at room temperature yields a 15% change in I
_S
, overwhelming smaller variations due to stress. Examples of these thermal errors are presented. We have developed a new non-temperature compensated approach based upon fixed emitter current biasing that still provides two degrees of freedom necessary to independently measure current gain and saturation current, but with manageable temperature sensitivity. Examples of the new measurement technique to characterize variations of β and I
_S
are presented for vertical npn transistors under tensile and compressive stresses ranging between 0 and 150 MPa. Current gain is shown to be a quasi temperature-compensated quantity relative to either the individual collector or base currents, with the residual temperature coefficient limited by the bandgap difference between the base and emitter regions of the transistor. Our experimental results agree well with macroscopic device models based upon piezoresistivity [1] and deformation potential based formulations [2]. The stress dependent transistor models are combined with SPICE circuit simulation to demonstrate the impact of stress on basic analog IC building blocks. Measurements agree well with both theoretical and circuit simulation calculations for PTAT voltage generators, bandgap references and operational amplifier offset voltages.